Capell's Half-flying Capacitor Analog Multiplexer
A method of multiplexing analog signals using a microcontroller's I/O pins.
This technique uses digital I/O pins to multiplex analog voltages into an analog input on the microcontroller. The method is most suitable for signals that do not need to be sampled frequently and it may be extended to accommodate a large number of inputs, though for a large number of inputs, the use of a separate analog multiplexer or a mincrocontroller with an integrated multiplexer would often be a better choice.
The test circuit, when running the associated firmware, compares two test voltages, appearing on the wires of the 10k pots, with a reference voltage, which appears on the wiper of the 50k pot. When a test voltage exceeds the reference voltage, the LED corresponding to that particular test voltage lights, demonstrating that the two sampled channels are independent.
The AT90S1200A used for the test has a single comparitor, but an analog multiplexer was formed using two of its digital bidirectional I/O ports. Notice that for each analog input, there is a 100k resistor, a .01 uf capacitor, and a diode. The resistor-capacitor combination form a low pass filter and switching of the charged capacitor is the means by which multiplexing is effected.
Here is how it works
The technique takes advantage of bidirectional I/O ports to switch from outputs to inputs. In the case of many AVR controllers, the input of the comparitor shares a pin with a bidirectional I/O bit. This allows the pin to be held at ground and then ungrounded when using it as an input for the comparitor.
Fig.4 Various states of one channel.
Most of the time, the circuit is in the "filtering" sate (see the illustrations above). The inputs are sampled periodically at a low duty cycle as the sampling duty cycle affects cross talk among the inputs. This is discussed in more detail below. During filtering time, pin 12, which is the input to the comparitor is held at ground and pin 12 (the I/O pin is an output, written with a logic low), Pin 14, which is the multiplexing pin, is open. Under these conditions, the filter capacitor is kept charged to the input voltage (V1).
When it is time for the input voltage to be connected to the comparitor input, pin 12 is opened (the I/O pin is made into an input) and the multiplexing pin, pin 14, is connected to + 5V (made into an output pin and written with a logic high). This causes the positively charged plate of the capacitor to be connected to +5V through the diode. This results in a a Vdd minus one diode drop, minus the voltage on the capacitor being applied to pin 12.
Link: http://cappels.org/dproj/hfcmux/hflycap.html
A method of multiplexing analog signals using a microcontroller's I/O pins.
This technique uses digital I/O pins to multiplex analog voltages into an analog input on the microcontroller. The method is most suitable for signals that do not need to be sampled frequently and it may be extended to accommodate a large number of inputs, though for a large number of inputs, the use of a separate analog multiplexer or a mincrocontroller with an integrated multiplexer would often be a better choice.
The test circuit, when running the associated firmware, compares two test voltages, appearing on the wires of the 10k pots, with a reference voltage, which appears on the wiper of the 50k pot. When a test voltage exceeds the reference voltage, the LED corresponding to that particular test voltage lights, demonstrating that the two sampled channels are independent.
The AT90S1200A used for the test has a single comparitor, but an analog multiplexer was formed using two of its digital bidirectional I/O ports. Notice that for each analog input, there is a 100k resistor, a .01 uf capacitor, and a diode. The resistor-capacitor combination form a low pass filter and switching of the charged capacitor is the means by which multiplexing is effected.
Here is how it works
The technique takes advantage of bidirectional I/O ports to switch from outputs to inputs. In the case of many AVR controllers, the input of the comparitor shares a pin with a bidirectional I/O bit. This allows the pin to be held at ground and then ungrounded when using it as an input for the comparitor.
Fig.4 Various states of one channel.
Most of the time, the circuit is in the "filtering" sate (see the illustrations above). The inputs are sampled periodically at a low duty cycle as the sampling duty cycle affects cross talk among the inputs. This is discussed in more detail below. During filtering time, pin 12, which is the input to the comparitor is held at ground and pin 12 (the I/O pin is an output, written with a logic low), Pin 14, which is the multiplexing pin, is open. Under these conditions, the filter capacitor is kept charged to the input voltage (V1).
When it is time for the input voltage to be connected to the comparitor input, pin 12 is opened (the I/O pin is made into an input) and the multiplexing pin, pin 14, is connected to + 5V (made into an output pin and written with a logic high). This causes the positively charged plate of the capacitor to be connected to +5V through the diode. This results in a a Vdd minus one diode drop, minus the voltage on the capacitor being applied to pin 12.
Link: http://cappels.org/dproj/hfcmux/hflycap.html