Full Version : David Vanhorn's Dallas Sextet Pot Handler (ASM)
avr >>ASSMBLER ROUTINES >>David Vanhorn's Dallas Sextet Pot Handler (ASM)


Admin5- 04-19-2006
David Vanhorn's DS1806.asm

A Handler for Dallas sextet pot

CODE

;***************************************************************************
;
; File Name  :'EEPOT.asm"
; Title   :
; Date   :
; Version  :
; Support telephone :765 287 1987  David B. VanHorn
; Support fax  :765 287 1989
; Support Email  :dvanhorn@cedar.net
; Support Snail ;1104 E 13th St, Muncie IN 47302
; Target MCU  :AT90S8515
;
;***************************************************************************;
; D E S C R I P T I O N
;
; Handler for DS1806 Sextet pot.
;
;***************************************************************************;
; M O D I F I C A T I O N   H I S T O R Y
;
;
;       rev.      date    who   why
; ---- --------  --- ------------------------------------------
; 0.01 98.11.30  dvh Creation
;
;*******************************************************************
;Hardware assignments, Hack to match your system. The three pot bits
;need to be outputs while talking to the pot. The pot will ignore
;traffic on POT_CK and POT_Data while POT_RST is low.
;*******************************************************************
;
.equ POT_Port=PORTA ;
.equ POT_RST=3 ;High when talking to pots. Low, when not
.equ POT_CK=7 ;Toggle high when data is valid
.equ POT_Data=6 ;Put the data here.. Duh!
;
;*******************************************************************
;
;You also need to declare POT1-POT6 in ram as temporary storage
;locations.
;
;*******************************************************************
;These routines ONLY update the RAM bytes, and change the pot values.
;You might want to save them in EEPROM, but that's another story.
;Alternately, one could write a routine that takes the direction and
;which pot to alter as passed parameters (in temp for example) but this
;gets the basics done.
;*******************************************************************
;
Pot1_Up:

push TEMP ;
push TEMP2 ;
push LOOP ;

lds TEMP,POT1;Get the previous setting from ram
rcall POT_Up ;
rcall Set_Pots;

pop LOOP ;
pop TEMP2 ;
pop TEMP ;
ret  ;


Pot1_Down:

push TEMP ;
push TEMP2 ;
push LOOP ;

lds TEMP,POT1;Get the previous setting from ram
rcall POT_Down;
rcall Set_Pots;

pop LOOP ;
pop TEMP2 ;
pop TEMP ;
ret  ;

;
;*******************************************************************
;Mid-Level pot adjustment, used for all pots
;*******************************************************************
;
;Inc, unless it goes to 65, then set back to 64.
;
POT_Up:
cpi TEMP,64 ;If it's sane
brlo PU_A ;then adjust it
ldi TEMP,63 ;otherwise force it sane
ret  ;and return
PU_A:
inc TEMP ;otherwise bump it
PU_Done:
ret  ;

;
;Dec, unless it wraps, then leave it at zero
;
POT_Down:
cpi TEMP,65 ;If it's sane,
brlo PD_A ;then adjust it
ldi TEMP,0 ;otherwise force it sane
ret  ;and return
PD_A:
cpi TEMP,0 ;If it's zero now,
breq PD_Done ;then leave it alone
dec TEMP ;otherwise dec it.
PD_Done:
ret  ;
;
;*******************************************************************
;Called whenever we want something to happen on the pots. This takes
;the pot values from memory and implements them in the hardware for
;all 6 pots.
;*******************************************************************
;
Set_Pots:
push TEMP ;

lds TEMP,POT1;
rcall Pot_Speak;
lds TEMP,POT2;
rcall Pot_Speak;
lds TEMP,POT3;
rcall Pot_Speak;
lds TEMP,POT4;
rcall Pot_Speak;
lds TEMP,POT5;
rcall Pot_Speak;
lds TEMP,POT6;
rcall Pot_Speak;

pop TEMP ;
ret
;*******************************************************************
;Send a byte to a pot.
;*******************************************************************
;
Pot_Speak:

ori TEMP,$C0 ;Unconditionally set the load bits

sbi POT_PORT,3 ;Assure reset

;!!! Fix these to your hardware!
sbi DDRA,3  ;Make it an output
sbi DDRA,7  ;
sbi DDRA,6  ;

cbi POT_PORT,POT_RST;Clear the Reset bit so the pot listens.

ror TEMP  ;1
rcall Pot_Bit  ;
ror TEMP  ;2
rcall Pot_Bit  ;
ror TEMP  ;3
rcall Pot_Bit  ;
ror TEMP  ;4
rcall Pot_Bit  ;
ror TEMP  ;5
rcall Pot_Bit  ;
ror TEMP  ;6
rcall Pot_Bit  ;
ror TEMP  ;7
rcall Pot_Bit  ;
ror TEMP  ;8
rcall Pot_Bit  ;

sbi POT_PORT,POT_RST;Assert RESET again

;!!! Fix these to your hardware!
sbi POT_PORT,7 ;high out, will be pullups on
sbi POT_PORT,6 ;
cbi DDRA,6  ;Inputs, with pullups
cbi DDRA,7  ;
ret
;
;*******************************************************************
;Send a single bit to the pot chip
;*******************************************************************
;
Pot_Bit:
brcc POT_Zero;
Pot_One:
sbi POT_Port,Pot_Data;
rjmp Pot_Clk ;
Pot_Zero:
cbi POT_Port,Pot_Data;
Pot_Clk:
nop  ;Centering the clock pulse a little
nop  ;
nop  ;This timing is correct for an 8 MHz
nop  ;clock, double up on the NOPS for 4 MHz
nop  ;
sbi POT_PORT,POT_CK;
nop  ;
nop  ;
nop  ;
cbi POT_PORT,POT_CK;
ret
;*******************************************************************
;



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