Full Version : Superhet AM Receiver Atmega2313 (ASM)
avr >>PROJECTS (AVR) >>Superhet AM Receiver Atmega2313 (ASM)


AVR_Admin- 04-28-2006
A Superhet/Direct Conversion AM receiver for 181.818 kHz
by Dick Cappel

A simple portable receiver with the antenna being the only LC circuit.
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Overview

This is a description of an experimental AM receiver for VLF. It is crystal controlled to receive 181.818 kHz (more or less) and operates as either a single conversion superhetrodyne or a direct conversion receiver. The bandwidths are expected to be 15 Hz to 3.5 kHz in superhet mode and 15 Hz to 10 kHz in the direct conversion mode. Operation is from a single +5 volt regulator and it can be powered from a 9 volt radio battery or other source of +8V or higher. The reason I built this was to verify some of my assumptions about these components would work together, having had numerous discussions of the SA-612/MK-484 and SA-612 direct conversion receiver concepts over the last year or so with my friend Jeff, besides that, I want to have a direct conversion receiver on hand for some planned experiments.

So, why 181.818 kHz? Its near the middle of a band of frequencies in which some countries, including the United States, allows unlicensed operation. For the U.S., see Code of Federal Regulations, Title 47, Volume 1, Section 15.217 Operation in the band 160 - 190 kHz. U.S. Government Printing Office, or look for it on the web. This particular frequency is easily derived from some common microcontroller crystal crystals, in this case a 6 Mhz crystal. Of course with the current generation of on-chip clocks, starting with the ATtiny series, crystals aren't really necessary for some applications. Other projects using this particular frequency are in the works.

Link to Site: http://cappels.org/dproj/dmrcvr/DualModeReceiver.html

AVR_Admin- 04-28-2006
CODE

;Copyright 2004 Richard Cappels, projects@cappels.org
;
;Program Name: vlflo -local oscillator, expecting a 6 MHz crystal.
;
;You should be able to copy this and paset it into your assembler.
;firmeare version vlflo13041105A


;The control input and all unused inputs have the internal weak pullup resistor enabled.
;When control pin is high, output is clock/33 (181 kHz) and pin 9 is high.
;When control pin is low, output is clock/22 (282 kHz) and pin 8 is high.
   


.include "2313def.inc"       ;Include file in same directory as project.


;Reload and prescale values of $F7 and $03 give 144 us interrupts.
.equ    Timer0Reload    = $F7   ;Timer 0 reload value for 144 us
.equ    Timer0Prescale  = $03   ;Timer 0 prescaler selector

.equ    MaxBitPhase     = 8   ;More than maximum number of bit phases.

.equ    RFSigPort       = PORTD   ;Port output signal is to appear on.
.equ    RFSigPin        = 6        ;Pin output signal is to appear on.

.equ    ContrlPort      = PIND   ;Port on which control input is located.
.equ    ContrlPin       = 2       ;Pin for input

.equ    Swout0PORT      = PORTD
.equ    Swout0Pin       = 4

.equ    Swout1PORT      = PORTD
.equ    Swout1Pin       = 5


.def    temp           = r16   ;General purpose scratch register.
.def    temp2          = r17   ;(not used)

;Definition of flag reg bits
;0
;1
;2
;3
;4
;5
;6
;7

;definition of I/O
;B0    + comparitor input
;B1    - comparitor input
;B2    (not assigned - configure as INPUT with weak pullup)        
;B3    (not assigned - configure as INPUT with weak pullup)    .    
;B4    (not assigned - configure as INPUT with weak pullup)    
;B5    (not assigned - configure as INPUT with weak pullup)    
;B6    (not assigned - configure as INPUT with weak pullup)    
;B7    (not assigned - configure as INPUT with weak pullup)    


;D0    Reserved FOR UART RECEIVE - input has weak pullup
;D1    Reserved FOR UART TRANSMIT -input has weak pullup.
;D2    (not assigned - configure as INPUT with weak pullup)
;D3    Control input - If high, output clock/22; if low, output clock/33.
;D4    Switch output - high when control pin is low.
;D5    Switch output - high when in control pin is high.
;D6    RF Signal Pin Isee .equ statements above
;D7    (not assigned - configure as INPUT with weak pullup)



.cseg    
.ORG $0000                   ;Initializaton code
   rjmp start

start:
 
   ldi    r16,RAMEND       ;Initialize Stack Pointer.
   out    spl,r16
                           ;Set PORTD.
   ldi    temp,0b01110000        
   out    DDRD,temp
   ldi    temp,0b11001111
   out    PORTD,temp    
   
                  ;Set PORTB.
   ldi    temp,0b00000000        
   out    DDRB,temp
   ldi    temp,0b11111100
   out    PORTB,temp        
   


Loop33:                           ;Make 181.8181818....kHz from 6 Mhz clock.
   sbi    RFSigPort,RFSigPin     ;Output High sbi and cbi are 2 clock instructions.

   cbi    Swout0PORT,Swout0Pin   ;Output bit 0 high
   sbi    Swout1PORT,Swout1Pin   ;Output bit 1 low

   sbi    RFSigPort,RFSigPin
   sbi    RFSigPort,RFSigPin
   sbi    RFSigPort,RFSigPin    
   sbi    RFSigPort,RFSigPin    
   sbi    RFSigPort,RFSigPin                
   nop
   cbi    RFSigPort,RFSigPin       ;Output Low
   cbi    RFSigPort,RFSigPin  
   cbi    RFSigPort,RFSigPin    
   cbi    RFSigPort,RFSigPin
   cbi    RFSigPort,RFSigPin
   cbi    RFSigPort,RFSigPin
   nop
   sbic    ContrlPort,ContrlPin    
   rjmp    Loop33           ;Do this forever unless control pin changes..
   

Loop22:                             ;Make 272.72727....kHz from 6 Mhz clock.
   sbi    RFSigPort,RFSigPin   ;Output High sbi and cbi are 2 clock instructions.
   cbi    Swout0PORT,Swout1Pin ;Output switch bit 1 low
   sbi    Swout1PORT,Swout0Pin ;Output switch bit 0 high

   sbi    RFSigPort,RFSigPin   ;Spend 11 cycles each in high and low..
   sbi    RFSigPort,RFSigPin
   nop
   cbi    RFSigPort,RFSigPin   ;Output Low    
   cbi    RFSigPort,RFSigPin   ;Spend either 11 clocks sending low.
   cbi    RFSigPort,RFSigPin    
   cbi    RFSigPort,RFSigPin
   sbis    ContrlPort,ContrlPin
   rjmp    Loop22    
   rjmp    Loop33               ;Do this forever.
   


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